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  1. Most of the results in this area reported until now focus on devices and interconnect; this work goes several steps further and presents issues related to circuits and architecture. Based on proposed nanoscale interconnect and device structures, we explore the design space available to the nanoelectronic circuit designer and system architect.

  2. 1 de abr. de 2010 · DOI: 10.1016/S1007-0214(10)70045-6 Corpus ID: 61010388; Recent advance in non-Krylov subspace model order reduction of interconnect circuits @article{Tan2010RecentAI, title={Recent advance in non-Krylov subspace model order reduction of interconnect circuits}, author={Sheldon X.-D. Tan and Boyuan Yan and Hai Wang}, journal={Tsinghua Science \& Technology}, year={2010}, volume={15}, pages={151 ...

  3. Recently model order reduction techniques for second-order systems have obtained many research interests for the simulation of RCS interconnect circuits employing susceptance elements. In this paper, we propose a Block SAPOR (Block Second-order Arnoldi method for Passive Order Reduction) for multi-input multi-output RCS circuits. The proposed Block SAPOR algorithm can simultaneously guarantee ...

  4. 18 de jan. de 2005 · A Block SAPOR (Block Second-order Arnoldi method for Passive Order Reduction) for multi-input multi-output RCS circuits can simultaneously guarantee passivity and achieve higher accuracy than the first order reduction technique PRIMA. Recently model order reduction techniques for second-order systems have obtained many research interests for the simulation of RCS interconnect circuits ...

  5. 1 de jul. de 2005 · 12. The results show that extremely high order RC interconnect can be high-accurately approximated by only third order balanced model. The Balanced Truncation Method (BTM) is applied to an even distributed RC interconnect case by using Wang’s closed-forms of even distributed RC interconnect models.

  6. 23 de ago. de 2022 · Analog matrix computing (AMC) with resistive memory implies naturally massive parallelism and in-memory processing, thus representing a promising solution for accelerating data-intensive workloads in many applications. In AMC circuits, the interconnect resistances residing in the crosspoint resistive arrays arise as a main non-ideal factor degrading the computing accuracy. Simulating and ...

  7. This paper reviews a number of low-swing on-chip interconnect schemes, and presents a thorough analysis of their effectiveness and limitations. In addition, several new interface circuits, presenting even more energy savings, are proposed. Some of these circuits not only reduce the interconnect swing, but also use very-low supply voltages, so as to obtain quadratic energy savings. The ...